Open Edge and HPC Initiative (OEHI) organized “Arm and RISC-V: Competition versus Synergies” workshop on 22nd June 2021 as an online event due to the pandemic. With 85 registrations across multiple countries and organizations, the workshop was attended by more than 60 people. The workshop was widely received as everyone (based on an online poll) mentioned that the event is market relevant and they would like to see more such events in the future. The workshop kicked off with an introduction to OEHI by Fabrizio Magugliani (E4) and Heiko Joerg Schick (Huawei). They introduced OEHI as a technology think-tank and a playground for HPC and AI innovators.
Dr. Fabrice Dupros provided a technical update on ARM platform roadmap and how SVE improves auto-vectorization to increase the computing performance. Dr. John Davis (BSC) argued for an open HPC ecosystem, where RISC-V can be used as research platform and ARM can quickly adopt those solutions. Jean-Marc Denis (SiPearl, EPI) gave an update on the European Processor Initiative and their objective to deliver a competitive product based on both ARM and RISC-V by 2023. Roger Ferrer Ibáñez (BSC) explained how ARM and RISC-V ecosystems can learn from each other with an example of supporting ARM SVE and RISC-V Vector Extension in LLVM.
A robust panel discussion moderated by Prof. Dirk Pleiter (KTH) and participation from Dr. Daniele Cesarini (CINECA) and other speakers concluded that ARM is a very good competitor for x86 and RISC-V would complement ARM in near future.
Slides and recordings of the talks:
|Open Edge and HPC Initiative (OEHI) Introduction||Fabrizio Magugliani|
Strategic Planning and Business Development
E4 COMPUTER ENGINEERING
|Huawei in OEHI|
The talk will give insights into how partners are using the OEHI infrastructure and how it helps to improve scientific computing and optimise middleware service for new computer architecture like ARMv8
|Heiko Joerg Schick|
Chief Architect, Advanced Computing
Huawei Technologies Munich
|ARM technologies for HPC|
Update on the latest announcements and activities
|Dr. Fabrice Dupros|
|HPC Opportunities: Past, Present, and in the Future|
Historically, research has been stifled by the lack of open platforms leading to computer architecture simulation and questionable results. This has led to slow adoption of some research ideas. With the slowing of Moore’s law, specialization and software/hardware co-design are critical requirements to meet the goals of future HPC systems. In this talk, I will present a few of the past, present and future in HPC and how Arm and RISC-V are playing different roles.
|Dr. John Davis|
Group Manager – European Exascale Accelerator
Barcelona Supercomputing Center
|European Processor Initiative: the place where ARM and RISC-V live in peace|
The European Processor Initiative (EPI) has been set to address the EU need for sovereignty in HPC compute engines. EPI develops technologies at high TRL, for short term needs, based on ARM ISA, and develop technologies at low TRL, for long term needs, based on RISC-V ISA. In this presentation, it will be discussed how EPI combines both objectives on the same platform.
Atos Chief of Staff , BDS Strategy & Innovation Distinguished Expert
Chair of the Board European Processor Initiative
|A Tale of Vectors|
While commercially rivals, Arm and RISC-V can benefit from synergies in the open source space.
In this talk I will try to make my point with an example of the work carried out in LLVM in order
to support Arm SVE and RISC-V.
|Roger Ferrer Ibáñez|
Senior Research Engineer
Compilers and Toolchains for HPC
Barcelona Supercomputing Center
|Panel Discussion on “Arm and RISC-V: Competition versus Synergies”||Moderator: Prof. Dirk Pleiter|
Panel: Dr. Daniele Cesarini (CINECA), Jean-Marc Denis (Atos, EPI), Roger Ferrer Ibáñez (BSC) , Fabrizio Magugliani (E4)